rev. 4162b?8051?06/02 active errata list uart/reception in modes 1, 2 and 3/uart false start bits detection during uart reception, clearing ren may generate unexpected it timer 2/downcounter mode/double it with slow external clock jbc/double it when external interrupt occurs during jbc instruction on start-up the microncontroller goes into test mode errata history errata description 1. uart/reception in modes 1, 2 and 3/uart false start bits detection when a false start bit occurs on the uart, some uart internal signals are not reset. then when a real start bit occurs, the sampling is shifted. workaround none. 2. during uart reception, clearing ren may generate unexpected it during uart reception, if the ren bit is cleared between a start bit detection and the end of reception, the uart will not discard the data (ri is set). workaround test ren at the beginning of the interrupt routine just after clr ri, and run the interrupt routine code only if ren is set. 3. timer 2/countdown mode/double it with slow external clock double it with slow external clock in countdown mode. timer 2 in 16-bit auto- reload in countdown mode with external clock input 2 interrupts are generated successively with low frequency on clock input (typ 10 - 40 khz). workaround caution: will not work if initially rcap = 0x0000 reload fffe into th2 - tl2 in isr and countdown to rcap-1 (to recover cycle lost in isr). 4. jbc/double it when external interrupt occurs during jbc instruction on polling algorithm in isr on ie1 or ie0 bit, when external it appears during jbc instruction, flag is not cleared and next jbc sees another it, then the same it is seen twice. workaround use jb instruction instead of jbc instruction to test bit and clr instruction to clear it. lot number errata list z41648 and below 1, 2, 3, 4, 5 z41648 and above 1, 2, 3, 4 8051 microcontrollers T87C5101 t83c5101 t83c5102 errata sheet
2 t8xc5101/02 errata sheet 4162b?8051?06/02 5. on start-up the microcontroller goes into test mode under specific conditions (power lead edge, temperature and p3 value) on start-up t8xc5101/02 devices do not exe- cute the user code. it goes into test mode and stays there. workaround 1. p3 = 0x00 2. send another reset pulse a few machine cycles after the falling edge of the first reset pulse.
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